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I: INTRODUCTION
The text, Fundamentals of Logic Design,7th edition, has been designed so that it
can be used either for a standard lecture course or for a self-paced course. The text is divided
into 20 study units in such a way that the average study time for each unit is about the same.
The units have undergone extensive class testing in a self-paced environment and have been
revised based on student feedback. The study guides and text material are sufficient to allow
almost all students to achieve mastery of all of the objectives. For example, the material on
Boolean algebra and algebraic simplification is 2½ units because students found this topic
difficult. There is a separate unit on going from problem statements to state graphs because
this topic is difficult for many students.
1.1 Using the Text in a Lecture Course
Even though the text was developed in a self-paced environment, the text is well
suited for use in a standard lecture course. Since the format of the text differs somewhat
from a conventional text, a few suggestions for using the text in a lecture course may be
appropriate. Except for the inclusion of objectives and study guides, the units in the text
differ very little from chapters in a standard textbook. The study guides contain very basic
questions, while the problems at the end of each unit are of a more comprehensive nature.
At the University of Texas a class composed largely of Electrical Engineering and
Computer Science sophomores and juniors covers 18 units (all units except 6 and 19) of
the text in one semester. Units 8, 10, 12, 16, 17, and 20 contain design problems that are
suitable for simulation and lab exercises. The design problems help tie together and review
the material from a number of preceding units. Units 10, 17, and 20 introduce the VHDL
2
1.2 Some Remarks About the Text
In this text, students are taught how to use Boolean algebra effectively, in contrast with
many texts that present Boolean algebra and a few examples of its application and then leave it to
the student to figure out how to use it effectively. For example, use of the theorem x + yz = (x + y)
(x + z) in factoring and multiplying out expressions is taught explicitly, and detailed guidelines are
given for algebraic simplification.
The most important and often most difficult part of sequential circuit design is formulating
the state table or graph from the problem statement, but most texts devote only a few paragraphs
to this subject because there is no algorithm. This text devotes a full unit to the subject, presents
guidelines for deriving state tables and graphs, and provides programmed exercises that help the
student learn this material. Most of the material in the text is treated in a fairly conventional
1.3 Using the Text in a Self-Paced Course
This section introduces the personalized system of self-paced instruction (PSI) and offers
suggestions for using the text in a self-paced course. PSI (Personalized System of Instruction)
is one of the most popular and successful systems used for self-paced instruction. The essential
features of the PSI method are
(a) Students are permitted to pace themselves through the course at a rate commensurate with
their ability and available time.
3
designed PSI course.
The PSI method of instruction and its implementation are described in detail in the following
references:
1. Keller, Fred S. and J. Gilmour Sherman, The Keller Plan Handbook, W. A. Benjamin, Inc.,
1974.
Results of applying PSI to a first course in logic design of digital systems are described in
Roth, C.H., Continuing Effectiveness of Personalized Self-Paced Instruction in Digital Systems
Engineering, Engineering Education, Vol. 63, No. 6, March 1973.
The instructor in charge of a self-paced course will serve as course manager in addition to
his role in the classroom. For a small class, he may spend a good part of his time acting as proctor
A progress chart showing the units completed by each student is very helpful in
monitoring student progress through the course. The instructor may wish to have individual
conferences with students who fall too far behind. The instructor needs to be available in the
classroom to answer individual student questions and to assist with grading of readiness tests
as needed. He should make a special point to speak with the weak or slow students and give
them a word of encouragement. From time to time he may need to settle differences which
arise between proctors and students.
4
period, most of the time was spent evaluating unit tests. We found that a standard 50 minute
class period was not long enough for a PSI session. We usually scheduled sessions of 1½ or
2 hours or longer depending on class size. This allowed adequate time for students to have
their questions answered, take a unit test, and have their tests graded. Interactive grading of
1.4. Use of Computer Software
Three software packages are included on the CD that accompanies the textbook. The first
is a logic simulator program called SimUaid, the second is a basic computer-aided logic design
program called LogicAid, and the third is a VHDL Simulator called DirectVHDL. In addition, we
use the Xilinx ISE software for synthesizing VHDL code and downloading to CPLD or FPGA circuit
boards. The Xilinx ISE software is available at nominal cost through the Xilinx University Program
(for information, go to www.xilinx.com/university/index.htm). A “Webpack” version of the Xilinx
software is also available for downloading from the Xilinx.com website.
LogicAid provides an easy way to introduce students to the use of the computer in the logic
design process. It enables them to solve larger, more practical design problems than they could by
hand. They can also use LogicAid to verify solutions that they have worked out by hand. Instructors
can use the program for grading homework and quizzes. We first introduce LogicAid in Unit 5. The
program has a Karnaugh Map Tutorial mode that is very useful in teaching students to solve Karnaugh
map problems. This tutorial mode helps students learn to derive minimum solutions from a Karnaugh
map by informing them at each step whether that step is correct or not. It also forces them to choose
essential prime implicants first. When in the KMap tutor mode, LogicAid prints “KMT” at the top of
each output page, so you can check to see if the problems were actually solved in the tutorial mode.
students construct state tables. It allows students to check their solutions without revealing the correct
5
1.5. Suggested Equipment for Laboratory Exercises
Many types of logic lab equipment are available that are adequate to perform the lab
exercises. Since most logic design is done today using programmable logic instead of individual
ICs, we now recommend use of CPLDs or FPGAs for hardware implementation of logic circuit
designs. At the University of Texas, we are presently using the XILINX Spartan-3 FPGA boards,
Unit 1 Solutions
7
II. SOLUTIONS TO HOMEWORK PROBLEMS
Unit 1 Problem Solutions
757.2510
16 | 757 0.25
1.1 (a) 123.1710
16 | 123 0.17
EB1.616 = E × 162 + B × 161 + 1 × 160 + 6 × 16–1
= 14 × 256 + 11 × 16 + 1 + 6/16 = 3761.37510
1110 1011 0001.011(0)2
E B 1 6
1.2 (a) 59D.C16 = 5 × 162 + 9 × 161 + D × 160 + C × 16–1
= 5 × 256 + 9 × 16 + 13 + 12/16 =
1437.7510
0101 1001 1101.110016
5 9 D C
1.1 (b)
1.2 (b)
3BA.2514 = 3 × 142 + 11 × 141 + 10 × 140 + 2 × 14–1
+ 5 ×14–2
= 588 + 154 + 10 + 0.1684 = 752.168410
1.3
1457.1110
16 | 1457 0.11
16 | 91 r1 16
1.4 (b)
Unit 1 Solutions
1.12 (c) A52.A411 = 10 × 121 + 5 × 11 + 2 + 10/11 + 4/121
= 1267.9410
∴ 1305.37510 = 519.60016
= 0101 0001 1001.0110 0000 00002
5 1 9 6 0 0
1644.87510
16 | 1644 0.875
16 | 102 r12 16
6 r6 (14).000
1.10 (c)
1.5 (a) 1 1 1
1111 (Add)
+1010
1111 (Multiply)
×1010
0000
See FLD p. 730 for solutions.
101 111 010 100.101 2 = 5724.58
= 5 × 83 + 7 × 82 + 2 × 81 + 4 × 80 + 5 × 8–1
= 5 × 512 + 7 × 64 + 2 × 8 + 4 + 5/8
= 3028.62510
1.11 (a)
375.548 = 3 × 64+ 7 × 8 + 5 + 5/8 + 4/64
= 253.687510
3 | 253 0.69
3 | 84 r1 3
3 | 28 r0 (2).07
301.1210
11.3310
16 | 111 0.33
6 r15 = F16 16
(5).28
100 001 101 111.0102 = 4157.28
= 4 × 83 + 1 × 82 5 × 81 + 7 × 80 + 2 × 8–1
= 4 × 512 + 1 × 64 + 5 × 8 + 7 + 2/8
= 2159.2510
384.7410
4 | 384 0.74
4 | 96 r0 4
1.12 (a)
1.6, 1.7,
1.8, 1.9
1.5 (b, c) See FLD p. 730 for solutions.
1.10 (b)
1.10 (d)
1.11 (b)
1.12 (b)
Unit 1 Solutions
9
3 | 97 .7
3 |32 r1 3
3 |10 r2 (2).1
1110212.202113
01 11 02 12.20 21 10 = 1425.6739
Base 3 Base 9
12 5
20 6
21 7
22 8
544.19 = 5 × 92 + 4 × 91 + 4 × 90 + 1 × 9–1
= 5 × 81 + 4 × 9 + 4 + 1/9
= 445 1/910
16 | 445 1/9
1.13
1.15
(c) 16 | 97 .7
16 | 6 r1 16
0 r6 (11).2
16
1.14 (a),
(b), (c)
1.14 (d)
5 | 97 .7
5 |19 r2 5
5 |3 r4 (3).5
0 r3 5
(2).5
∴ 97.710 = 342.322..5
1.14 (e)
2983 63/6410 =
8 | 2983 0.984
1.16 (a) 93.7010
8 | 93 0.70
1.16 (b)
1900 31/3210
8 | 1900 0.969
8 | 273 r4 8
109.3010
8 | 109 0.30
8 | 13 r5 8
1.16 (c) 1.16 (d)
Unit 1 Solutions
11011 Quotient
1110 )110000001
1110
10100
1 1 1 1 1
110010 (Add) 110010 (Sub)
11101 11101
1001111 10101
110010 (Mult)
11101
110010
1 1 1 1 1
(a) 10100100 (b) 10010011
01110011 01011001
0110001 00111010
1 1
(c) 11110011
10111 Quotient
110 )10001101
110
1.17(c)
101110 Quotient
101 )11101001
101
1001
1100 Quotient
1001 )1110010
1001
1 1 1 1 1 1
1111 (Add) 1111 (Subtract)
1001 1001
11000 0110
1 1 1 1 1
1101001(Add) 1101001 (Sub)
110110 110110
10011111 110011
1011000100110
1.17 (a) 1.17 (b)
1.18
1.19(a) 1.19(b)
1.19(c) 1.20(a)
Unit 1 Solutions
11
(a) 4 + 3 is 10 in base 7, i.e., the sum digit is
0 with a carry of 1 to the next column. 1 + 5 +
4 is 10 in base 7. 1 + 6 + 0 is 10 in base 7. This
overows since the correct sum is 10007.
1.21 If the binary number has n bits (to the right of the
radix point), then its precision is (1/2n+1). So to
have the same precision, n must satisfy
1.22
8(10/11) = 7 + 3/11
8(3/11) = 2 + 2/11
8(2/11) = 1 + 5/11
8(5/11) =3 + 7/11
8(7/11) = 5+ 1/11
8(1/11) = 0 + 8/11
8(8/11) = 5 + 9/11
8(9/11) = 6 + 6/11
8(6/11) = 4 + 4/11
Expand the base b number into a power series
N = d3k-1b3k-1 + d3k-2b3k-2 + d3k-3b3k-3 + …. +
d5b5 + d4b4 + d3b3 + d2b2 + d1b1 + d0b0 + d-1b-1 +
d-2b-2 + d-3b-3 + …. + d-3m+2b-3m+2 + d-3m+1b-3m+1
+ d-3mb-3m where each di has a value from 0 to
(b-1). (Note that 0’s can be appended to the number
1.24 (a)
1011 Quotient
1010 )1110100
100011 Quotient
1011 )110000011
1.20(b) 1.20(c)
(5 – 1) = 45, (52 – 1) = 445 and (53 – 1) = 4445
(bn-1) = (b – 1)(bn-1) + bn-1
1.25(a)
1.25(b)
1.26(a) (b + 1)2 = b2 + 2b + 1 so (11b)2 = 121b if b > 2.
(b2 + b + 1)2 = b4 + 2b3 + 3b2 + 2b + 1 so
1.26(b)
Unit 1 Solutions
12
20 0 1 0
30 0 1 1
40 1 1 0
50 1 1 1
61 0 0 0
71 0 0 1
81 0 1 0
91 0 1 1
(0100)
(0101)
(1100)
(1101)
20 0 1 0
30 0 1 1
40 1 1 0
51 0 0 0
61 0 0 1
71 0 1 0
81 0 1 1
91 1 1 0
(0100)
(0101)
(1100)
(1101)
Alternate
Solutions:
7 3 2 1
00 0 0 0
10 0 0 1
20 0 1 0
30 1 0 0
(0011)
1.33
71 0 0 1
81 0 0 0
91 1 1 1
and 1’s with
0’s (bit-by-bit
complement).
81 1 0 1
91 1 1 0
9154 =
1110 0001 1001 1000
1.28
5-3-1-1 is possible, but
30 1 0 0
40 1 0 1
51 0 0 0
61 0 0 1
71 0 1 1
5-4-1-1 is not possible, because there is no way to
represent 3 or 8. 6-3-2-1 is possible:
6 3 2 1
00 0 0 0
10 0 0 1
1.29
1.30
(0110)
(1010)
1.27(a) (0.12)3 = (1/3 + 2/9)10 = (2/6 + 8/36)10
= (3/6 + 2/36)10 = (0.32)6
Unit 1 Solutions
13
In 2’s complement In 1’s complement
(–8) + (–11) (–8) + (–11)
In 2’s complement In 1’s complement
11 + 9 11 + 9
1.36 (c) 1.36(d)
1.35 (a) 222.2210
16 | 222 0.22
1.35 (b) 183.8110
16 | 183 0.81
In 2’s complement In 1’s complement
(–10) + (–6) (–10) + (–6)
1.36 (a) In 2’s complement In 1’s complement
(–10) + (–11) (–10) + (–11)
1.36 (b)
In 2’s complement In 1’s complement
10110 10110
+ 10011 + 10010
(1)01001 (1)01000
overow 1
01001
overow
1.37 (a)
1.37 (c)
In 2’s complement In 1’s complement
(–11) + (–4) (–11) + (–4)
01001-11010
In 2’s complement In 1’s complement
1.37 (b) In 2’s complement In 1’s complement
11010 11010
+ 00111 + 00110
(1)00001 (1)00000
1
00001
1.36 (e)
In 2’s complement In 1’s complement
11011 11011
In 2’s complement In 1’s complement
11100 11100
1.37 (e)1.37 (d)
Unit 1 Solutions
In 2’s complement In 1’s complement
10001 10001
In 2’s complement In 1’s complement
10101 10101
1.38 (c) 1.38 (d)
(a) add subt
101010 101010
overow
1.39 (a) complement
i) 00000000 (0) 11111111 (-0)
1.40
(a) (16)(4) = 64, add 2 0’s to get 6400
(10)(2) = 20, add 1 0 to get 200
(7)(1) = 7
6400 + 200 + 7 = 6607
(b) (dn-1dn-2 … d1d0)20 = dn-1(20)n-1 +
1.41 (a) If A + B < 2n-1 – 1, then the sign bit of A + B is
0 indicating a positive number with magnitude
A + B. If A + B > 2n-1 – 1, then the sign bit
of A + B is 1 indicating a negative number with
magnitude 2n – (A + B).
1.42
A and B positive: Overow does not occur if
A + B < 2n – 1 – 1 in which case A + B has a sign
bit of 0 and has a magnitude of A + B.
A positive and B negative and A > |B|: A + 2n –
1.43 1.43
cont.
A and B negative: (2n – 1 – A) + (2n – 1 – B) =
2n – 1 – (A + B) after the end-around carry. There
is no overow if A + B < 2n – 1 – 1 in which case
Unit 1 Solutions
15
1.44 Two positive numbers
No overow: 0x…x + 0x…x = 0x…x
carry in = 0 = carry out
Overow: 0x…x + 0x…x = 1x…x
carry in = 1, carry out = 0
1.45 There is no overow if the carry into the sign
position equals the carry out of the sign position.
There is overow if the carry into the sign position
does not equal the carry out of the sign position
unless an end around carry causes a carry into the
sign position.
1.46 If bn-1 = 0, then bn-22n-2 + bn-32n-3 + … + b12
+ b0 is the value of the positive number. If bn-1 =
1, then
– 2n-1 + bn-22n-2 + bn-32n-3 + … + b12 + b0
