Problem Solutions – Chapter 7
CHAPTER 7
7-1.*
7-2.
a)

(835) (11 0100 0011) , (15, 103) (0011101011111111)
7-3.*
Number of bits in array =
 
16 4 20 10 10
2 2 2 2 2
7-4.
a) Number of RAM cell arrays
 
31 14 14 28 3
8 (2G 2 ) / (2 2 2 ) (2 8)
7-5.
7-6.
7-7.
Interval between refreshes = 64ms/8192 = 7.8125 μs
Problem Solutions – Chapter 7
2
7-8.*
a) 2 MB/128 K × 16 = 2MB/ 256 KB = 8 b) With 2 byte/word,
20
2MB/2 B 2 ,
Add Bits = 20
7-9.
7-10.
An SDRAM simultaneously reads the desired row and stores all of the information in the I/O
7-11.
A DDR SDRAM uses both the positive and negative edges of the clock to transfer data. This