21.10) In the circuit of Figure 21.22, if the digital output is in the high state, would you expect the signal seen by
the digital input to be in a high or low state?
21.11) In the circuit of Figure 21.22, if the digital output connected to the cathode of the diode (D1) swings
between 0.4 V while sinking a maximum of 3.2 mA and 4.5 V while sourcing a maximum of 1 mA, D1 has
a Vf of 1.5 V, the CTR of the opto-coupler is 50%, and the digital input connected to the collector of the
photo-transistor has specifications of VIH = 3.5 V, IIH = 10 A, VIL = 1.5 V, IIL = -10 A, choose values for
R1 and R2 that will result in acceptable input voltages to the digital input.
The ON state of the LED is most critical here and that is the low state of the output. The output will be at