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The first commercial RISC product was _________.
A. SPARC
B. CISC
C. VAX
D. the Pyramid
The _________ is that part of the computer that actually performs arithmetic and
logical operations on data.
The decimal system has a base of _________.
A. 0
B. 10
C. 100
D. 1000
Which of the following interrelated factors go into determining the use of the
addressing bits?
A. number of operands
B. number of register sets
C. address range
D. all of the above
When data are moved over longer distances, to or from a remote device, the process is
known as __________.
A. data communications
B. registering
C. structuring
D. data transport
One distinguishing characteristic of memory that is designated as _________ is that it is
possible to both read data from the memory and to write new data into the memory
easily and rapidly.
A. RAM
B. ROM
C. EPROM
D. EEPROM
Theoretically, a DDR module can transfer data at a clock rate in the range of
__________ Mbps.
A. 200 to 400
B. 400 to 1066
C. 600 to 1400
D. 800 to 1600
________ is when the disk rotates more slowly for accesses near the outer edge than for
those near the center.
A. Constant angular velocity (CAV)
B. Magnetoresistive
C. Constant linear velocity (CLV)
D. Seek time
Each data path consists of a pair of wires (referred to as a __________ ) that transmits
data one bit at a time.
A. lane
B. path
C. line
D. bus
The ________ consists of the access time plus any additional time required before a
second access can commence.
A. latency
B. memory cycle time
C. direct access
D. transfer rate
The ________ holds the address of the next instruction to be fetched.
A. IR
B. PC
C. MAR
D. MBR
A logical cache stores data using __________.
A. physical addresses
B. virtual addresses
C. random addresses
D. none of the above
The MIPS R4000 uses ________ bits for all internal and external data paths and for
addresses, registers, and the ALU.
A. 16
B. 32
C. 64
D. 128
RAID level ________ has the highest disk overhead of all RAID types.
A. 0
B. 1
C. 3
D. 5
The _________ contains the address of the next microinstruction to be read.
A. control memory
B. control address register
C. control word
D. control buffer register
The _________ is a small cache memory associated with the instruction fetch stage of
the pipeline.
A. dynamic branch
B. loop table
C. branch history table
D. flag
Facilities and services provided by the OS that assist the programmer in creating
programs are in the form of _________ programs that are not actually part of the OS
but are accessible through the OS.
A. utility
B. multitasking
C. JCL
D. logical address
An operation that switches the processor from one process to another by saving all the
process control data, register, and other information for the first and replacing them
with the process information for the second is:
A. resource ownership switch
B. process switch
C. thread switch
D. cluster switch
The essence of the ________ approach is the ability to execute instructions
independently and concurrently in different pipelines.
A. scalar
B. branch
C. superscalar
D. flow dependency
__________ refers to whether memory is internal or external to the computer.
A. Location
B. Access
C. Hierarchy
D. Tag
________ instructions operate on the bits of a word as bits rather than as numbers,
providing capabilities for processing any other type of data the user may wish to
employ.
A. Logic
B. Arithmetic
C. Memory
D. Test
A _________ is a small, very-high-speed memory maintained by the instruction fetch
stage of the pipeline and containing the n most recently fetched instructions in
sequence.
A. loop buffer
B. delayed branch
C. multiple stream
D. branch prediction
The principal advantage of ___________ addressing is that it is a very simple form of
addressing.
A. displacement
B. register
C. stack
D. direct
A __________ disk is permanently mounted in the disk drive, such as the hard disk in a
personal computer.
A. nonremovable
B. movable-head
C. double sided
D. removable
The ________ layer is the key to the operation of Thunderbolt and what makes it
attractive as a high-speed peripheral I/O technology.
A. cable
B. application
C. common transport
D. physical
With _________ the microchip is organized so that a section of memory cells are erased
in a single action.
A. flash memory
B. SDRAM
C. DRAM
D. EEPROM
A portion of main memory used as a buffer to hold data temporarily that is to be read
out to disk is referred to as a _________.
A. disk cache
B. latency
C. virtual address
D. miss
Which of the following is correct?
A. 25 = (2 x 102) + (5 x 101)
B. 289 = (2 x 103) + (8 x 101) + (9 x 100)
C. 7523 = (7 x 103) + (5 x 102) + (2 x 101) + (3 x 100)
D. 0.628 = (6 x 10-3) + (2 x 10-2) + (8 x 10-1)
The most fundamental type of machine instruction is the _________ instruction.
A. conversion
B. data transfer
C. arithmetic
D. logical
There must be ________ instructions for moving data between memory and the
registers.
A. branch
B. logic
C. memory
D. I/O
A register is a digital circuit used within the CPU to store one or more bits of data.
Hexadecimal has a base of _________.
A. 2
B. 8
C. 10
D. 16
Which data type is defined in MMX?
A. packed byte
B. packed word
C. packed doubleword
D. all of the above
__________ memory consists of peripheral storage devices, such as disk and tape.
The ARM11 MPCore is an example of the L1 cache being divided into instruction and
data caches.
The x86 provides four instructions to support procedure call/return: CALL, ENTER,
LEAVE, and _________.
With simple, one cycle instructions, there is little or no need for microcode.
"To subtract one number from another, take the twos complement of the subtrahend and
add it to the minuend" is the _________ rule.
The term ________ refers to a machine that is designed to improve the performance of
the execution of scalar instructions.
An external device connected to an I/O module is often referred to as a __________
device.
In a ________ interface there is only one line used to transmit data and bits must be
transmitted one at a time.
Two approaches can be taken to organizing the encoded microinstruction into fields:
functional and __________.
Combinational circuits are often referred to as "memoryless" circuits because their
output depends only on their current input and no history of prior inputs is retained.
The _________ lines are used to control the access to and the use of the data and
address lines.
An L1 cache that does not connect directly to the bus cannot engage in a snoopy
protocol.
A combinational circuit can be defined by Boolean equations, truth table, and
_________.
It is the responsibility of the processor to periodically check the status of the I/O
module until it finds that the operation is complete.
In the decimal system, _________ is the maximum value that a position can hold before
it flips over into the next higher position.
The principal function of the 8818 __________ is to generate the next microinstruction
address for the microprogram.
