Exam
Name___________________________________
MULTIPLE CHOICE. Choose the one alternative that best completes the statement or answers the question.
Figure 6–3
1)
The boolean expression for the decoder in Figure 6–3 is ________.
1)
A)
X =ABCD
B)
X =ABCD
C)
X =ABCD
D)
None of these
2)
Which of the following is correct for full–adders?
2)
A)
Full–adders have the capability of directly adding decimal numbers.
B)
Full–adders are limited to two inputs, since there are only two binary digits.
C)
The first stage of a parallel full–adder may be a half–adder.
D)
Full–adders are used to make half–adders.
3)
Which statement below best describes the function of a decoder?
3)
A)
A decoder will convert a binary number into a specific output representing a particular
character or digit.
B)
Decoders are special ICs that are used to make it possible for one brand of computer to talk to
another.
C)
Decoders are used to prevent improper operation of digital systems.
D)
A decoder will convert a decimal number into the proper binary equivalent.
1
4)
What is the major difference between half–adders and full–adders?
4)
A)
Full–adders are made up of two half–adders.
B)
Half–adders can only handle single digit numbers.
C)
Full–adders have a carry input capability.
D)
Full–adders can handle double digit numbers.
5)
A 1–of–16 decoder IC has ________ data input connection(s).
5)
A)
16
B)
4
C)
8
D)
1
6)
What is one advantage of the look–ahead–carry adder?
6)
A)
It requires advance knowledge of the final answer.
B)
It is slower than the ripple–carry adder.
C)
It is faster than a ripple–carry adder.
D)
It is easier to implement logically than a full–adder.
7)
The carry output of a half–adder can be expressed as ________.
7)
A)
Cout = A B
B)
Cout = A + B
C)
Cout = AB
D)
none of these
8)
A multiplexer with four select, or address, lines can select one of ________ inputs.
8)
A)
15
B)
16
C)
3
D)
7
2
Figure 6–2
9)
Refer to the symbol in Figure 6–2. What are the output when A = 1, B = 1, Cin = 1?
9)
A)
= 0, Cout = 1
B)
= 1, Cout = 0
C)
=1, Cout = 1
D)
= 0, Cout = 0
10)
The circuit below can be used as a(n) ________.
10)
A)
4–bit comparator
B)
4–bit half–adder
C)
8–bit comparator
D)
dual 4–line multiplexer
3
11)
The symbol below most likely represents a ________.
11)
A)
demultiplexer
B)
full–adder
C)
multiplexer
D)
comparator
12)
Refer to the symbol in Figure 6–2. What are the output when A = 1, B = 1, Cin = 0?
12)
A)
= 1, Cout = 0
B)
= 0, Cout = 1
C)
=1, Cout = 1
D)
= 0, Cout = 0
13)
The output of the decoder in Figure 6–3 will be 1 only when ________.
13)
A)
A = 0, B = 1, C= 0, D = 1
B)
A = 1, B = 0, C= 1, D = 0
C)
A = 0, B = 0, C= 0, D = 0
D)
A = 1, B = 1, C= 1, D = 1
Figure 6–1
14)
The symbol in Figure 6–1 represents a(n) ________.
14)
A)
PLD
B)
full–adder
C)
AND function
D)
half–adder
15)
What is another name used for a multiplexer?
15)
A)
Demultiplexer
B)
Attenuator
C)
Multiplier
D)
Data selector
D
16)
The symbol below most likely represents a ________.
16)
A)
multiplexer
B)
demultiplexer
C)
full–adder
D)
comparator
A
5
D
Figure 6–2
17)
The symbol in Figure 6–2 represents a(n) ________.
17)
A)
PLD
B)
half–adder
C)
And function
D)
full–adder
18)
The expression (A B) Cin describes ________.
18)
A)
the carry output of a full–adder
B)
the sum output of a full–adder
C)
the carry output of a half–adder
D)
the sum output of a half–adder
19)
The function ABCD can be decoded with ________.
19)
A)
two 2–input OR gates and one inverter
B)
one 4–input AND gate and two inverters
C)
two 2–input OR gates and two inverters
D)
one 4–input AND gate and one inverter
Figure 6–1
20)
Referring to the symbol in Figure 6–1, which combination of outputs should never occur?
20)
A)
= 1, Cout = 0
B)
= 0, Cout = 0
C)
= 0, Cout = 1
D)
= 1, Cout = 1
6
21)
Which of the following is true for IC comparator circuits?
21)
A)
All comparators have outputs for indicating A<B, A>B, and A=B.
B)
Comparators can compare only 2 bits at a time.
C)
Comparators can compare only two values at a time.
D)
None of these
22)
The expression A B represents ________.
22)
A)
the sum output of a half–adder
B)
the carry output of a full–adder
C)
the carry output of a half–adder
D)
the sum output of a full–adder
23)
What is one disadvantage of the ripple–carry adder?
23)
A)
More stages are required to a full–adder.
B)
The interconnections are more complex.
C)
It is slow, due to propagation time.
D)
All of the above are correct.
24)
The expression AB + (A B)Cin describes ________.
24)
A)
the carry output of a half–adder
B)
the carry output of a full–adder
C)
the sum output of a half–adder
D)
the sum output of a full–adder
7
Figure 6–1
25)
Refer to the symbol in Figure 6–1. When A = 0 and B = 1, ________.
25)
A)
= 1, Cout = 1
B)
= 0, Cout = 0
C)
= 1, Cout = 0
D)
= 0, Cout = 1
26)
A BCD–to–decimal decoder has ________ data input lines and ________ data output lines.
26)
A)
1,10
B)
7,9
C)
10,10
D)
4, 10
TRUE/FALSE. Write ‘T’ if the statement is true and ‘F’ if the statement is false.
27)
Full–adders do not provide for a carry input or a carry output.
27)
28)
A group of four bits is called a byte.
28)
29)
A BCD–to–7–segment decoder can be classified as a 10–line to 7–line decoder.
29)
30)
Adders with greater bit capacities can be constructed by connecting 2–bit adders in parallel.
30)
31)
A demultiplexer has multiple inputs and a single output.
31)
32)
The function of a decoder is to break a decimal or other character code down into a binary code.
32)
8
33)
Full–adders can be used as a BCD–to–binary converters.
33)
34)
A mux basically reverses the function of a demux.
34)
35)
In binary addition, 0 + 0 = 00.
35)
36)
The look–ahead–carry adder is slower than the ripple–carry adder because it requires additional
logic circuits.
36)
37)
Demultiplexers are also known as data distributors.
37)
38)
Converting a decimal number to its binary equivalent is an example of encoding.
38)
39)
A half–adder has no carry–in bit.
39)
40)
Decoder glitches can be eliminated by a method known as stripping.
40)
41)
In binary addition, 1 + 1 = 10.
41)
42)
A BCD–to–decimal decoder can be classified as a 4–line to 10–line decoder.
42)
43)
In binary addition, 1 + 0 = 1.
43)
44)
When paralleling 2–bit full–adders, the carry–out of each stage is connected to the carry–in of the
next–higher stage.
44)
9
45)
A demux basically reverses the function of a mux.
45)
46)
A multiplexer has multiple inputs and a single output.
46)
10
Answer Key
Testname: C6
11