Exam
Name___________________________________
MULTIPLE CHOICE. Choose the one alternative that best completes the statement or answers the question.
1)
Timing issues in computer systems generally occur when ________.
1)
A)
the design uses discount parts
B)
the processor signal timing fails to meet the setup and hold specifications of system devices
C)
the system uses through–hole rather than surface–mount parts
D)
the data bus is not wide enough
2)
DMA stands for ________.
2)
A)
direct memory access, operations that allow the CPU direct access to the memory of I/O
devices
B)
direct memory access, allowing memory operations to take place directly between certain I/O
devices and memory which allows the CPU to continue its operation with minimum
interruptions
C)
direct multiple access, operations directly between the CPU and multiple I/O devices which
speed up the computer system
D)
all of the above, depending on the system
B
3)
The states a tri–state output can assume are ________.
3)
A)
input, output, and bidirectional
B)
LOW, HIGH, and low–impedance
C)
active–HIGH, active–LOW, and complemented
D)
LOW, HIGH, and high–impedance
D
4)
All of the following are system bus types except ________.
4)
A)
asynchronous
B)
quasi–synchronous
C)
semi–synchronous
D)
synchronous
B
B
5)
An I/O port can be ________.
5)
A)
an input, output, or both
B)
serial or parallel
C)
direct or memory mapped
D)
all of the above
6)
During a write operation ________.
6)
A)
the processor waits for the selected device to activate the write control line before placing data
on the data bus
B)
the processor places data on the data bus before activating the write control line
C)
the processor activates the write control line before placing data on the data bus
D)
none of the above
7)
BIOS memory ________.
7)
A)
contains the computer operating system
B)
must retain information when power is removed
C)
contains the same code for all computer systems
D)
all of the above
8)
Normal processor operation can be temporarily suspended by ________.
8)
A)
hardware interrupts
B)
software exceptions
C)
bus requests
D)
all of the above
9)
All of the following are basic elements of the microprocessor except ________.
9)
A)
memory management unit
B)
timing and control unit
C)
arithmetic logic unit
D)
register array
10)
System services ________.
10)
A)
must be provided by application software
B)
does not require hardware support
C)
are immune to problems caused by poorly–designed processes
D)
allow processes to interact with each other without compromising system security
11)
A memory management unit performs all of the following tasks except ________.
11)
A)
cache control
B)
bus buffering
C)
wait state generation
D)
address translation for virtual memory
B
12)
Multitasking differs from multiprocessing in that ________.
12)
A)
multitasking uses a single processor to run multiple processes
B)
multiprocessing uses a single processor to run multiple processes
C)
the CPU must alternate between running processes when multiprocessing
D)
multitasking can run multiple processes simultaneously
A
13)
A compiler ________.
13)
A)
allows machine code for one processor to run on another processor
B)
converts a high–level language to machine code
C)
converts assembly language into a high–level language
D)
converts machine code into assembly language
B
D
14)
The difference between preemptive and non–preemptive multitasking is ________.
14)
A)
non–preemptive multitasking must wait for a running process to voluntarily relinquish the
CPU before running another process
B)
non–preemptive multitasking can suspend a running process to allow another process to run
C)
single–processor systems must use non–preemptive multitasking
D)
preemptive multitasking works for single– and multi–processor systems.
15)
A bus that will automatically insert wait states unless a signal indicates that it should terminate the
bus cycle is ________.
15)
A)
asynchronous
B)
quasi–synchronous
C)
semi–synchronous
D)
synchronous
16)
The processor unit responsible for performing operations such as multiplication and
complementing binary data values is the ________.
16)
A)
timing and control unit
B)
register array
C)
instruction decode register
D)
arithmetic logic unit
17)
What is interrupt–driven I/O and what is its major advantage?
17)
A)
Individual I/O devices regularly send inquiries to the CPU to see if it is available for a specific
I/O operation; if the CPU is available, the I/O device then proceeds to carry out its operation.
B)
An I/O device needing service sends a request to the PIC (programmable interrupt controller),
which in turn notifies the CPU of the request based on the assigned priority level of the
specific I/O device. If there are no pending I/O requests the CPU does not have to spend time
checking the I/O ports.
C)
Each individual I/O device is checked sequentially on a regular basis to see if it needs to be
serviced. This slows down the CPU operation.
D)
Each individual I/O device is serviced sequentially on a regular basis by the PIC. This speeds
up the I/O process.
18)
A 16–bit address bus can directly access up to ________.
18)
A)
65,536 memory locations
B)
1,024 memory locations
C)
16 memory locations
D)
256 memory locations
19)
Which of the following devices is normally bidirectional?
19)
A)
printer
B)
monitor
C)
keyboard
D)
disk drive
D
20)
C++
is an example of ________.
20)
A)
an assembly language
B)
a high–level language
C)
a compiler
D)
machine language
B
21)
A storage device typically ________.
21)
A)
contains dynamic information that frequently changes
B)
interfaces with the system through a peripheral device
C)
stores information electronically
D)
is a semiconductor device
B
22)
Devices whose outputs share signal lines must use ________.
22)
A)
3.3V or lower logic voltages
B)
open collector outputs
C)
tri–state outputs
D)
either B or C
D
A
23)
The main disadvantage of using buffers is ________.
23)
A)
it inverts the buffered signal
B)
it increases part costs
C)
it increases signal propagation delay
D)
it increases power dissipation
24)
Which of the following is a typical microcomputer input device?
24)
A)
plotter
B)
monitor
C)
printer
D)
keyboard
25)
Multiprocess or multiuser systems run in supervisor mode for all the following situations except
________.
25)
A)
when running application software
B)
when powering up
C)
when servicing and interrupt or exception
D)
when running the operating system code
26)
Processor elements consists of all of the following except ________.
26)
A)
the program counter
B)
the condition code register
C)
the memory management unit
D)
the instruction decode register
27)
Address bus signals typically ________.
27)
A)
unidirectional
B)
are active–HIGH
C)
open collector
D)
all of the above
28)
All of the following are processor instruction types except ________.
28)
A)
data transfer
B)
encryption
C)
loops and jumps
D)
arithmetic
29)
An assembler is used to ________.
29)
A)
convert assembly language to machine code
B)
write and edit assembly language programs
C)
convert the assembly language for one processor to the assembly language for another
processor
D)
convert a high–level language to assembly language
A
30)
Pulse width modulation can be used to control a motor by using the duty cycle to ________.
30)
A)
change the amplitude of the winding voltage
B)
change the amplitude of the winding current
C)
change effective current delivered to the motor winding
D)
change the effective voltage applied to the motor winding
C
31)
Which of the following is not normally a part of a microcomputer?
31)
A)
memory unit
B)
ALU
C)
control unit
D)
multiplexer
D
32)
Various I/O devices are commonly connected to the bus by using ________.
32)
A)
buffers
B)
clampers
C)
tri–state circuits
D)
inverters
C
B
33)
Communication controllers in microcontrollers ________.
33)
A)
require a separate external clock source to operate
B)
support only UART communication
C)
require little configuration to operate
D)
allow microcontrollers to communicate with other devices using specific communication
protocols
34)
Devices typically used to solve loading problems are ________.
34)
A)
encoders
B)
shift registers
C)
buffers
D)
multiplexers
35)
All of the following are processor addressing modes except ________.
35)
A)
inherent addressing
B)
immediate addressing
C)
indexed addressing
D)
implicit addressing
36)
Polling ________.
36)
A)
is more efficient than interrupt–driven processor operation
B)
has the processor operate normally until a device signals that it requires servicing
C)
requires the processor to periodically check each device to see which if any of them require
servicing
D)
none of the above
37)
The addressing mode that is used by branching instructions is ________.
37)
A)
indexed addressing
B)
relative addressing
C)
absolute addressing
D)
indirect addressing
38)
A bus that will terminate the bus cycle unless a signal indicates that it should insert wait states is
________.
38)
A)
asynchronous
B)
quasi–synchronous
C)
semi–synchronous
D)
synchronous
39)
An advantage of assembly language programs is ________.
39)
A)
they can use the same compiler tools as high–level languages
B)
they can run on any processor
C)
they typically run faster than programs written in a high–level language
D)
they are well–suited for large and complex applications
40)
A device typically used to allow the processor to select specific devices in the system is ________.
40)
A)
a demultiplexer
B)
a decoder
C)
a shift register
D)
none of the above
41)
Loading problems are typically caused by ________.
41)
A)
overclocking
B)
noisy supply voltages
C)
fanout
D)
fan–in
42)
The control bus signals of a processor differ from address and data bus signals in that they
________.
42)
A)
vary in characteristic, nature, and function from each other
B)
operate at different logic level voltages
C)
are always active–LOW
D)
must always be buffered
43)
To access 16 MB (16,777,216) memory locations a processor requires ________,
43)
A)
64–bit address bus
B)
32–bit address bus
C)
20–bit address bus
D)
24–bit address bus
44)
Microcontrollers integrate common peripherals with a ________.
44)
A)
precision oscillator
B)
power supply
C)
processor core
D)
memory management unit
45)
During a read operation ________.
45)
A)
the processor places the transferred data on the data bus so that the selected device can store
it back in memory
B)
the processor waits for the selected device to activate the read control line before transferring
data from the data bus into an internal register
C)
the selected device no longer contains data once the processor transfers it from the data bus
D)
the processor deactivates the read control line once it has latched the data on the data bus into
an internal register
46)
The addressing mode that uses the second byte of the instruction to specify the operand is
________.
46)
A)
extended addressing
B)
absolute addressing
C)
immediate addressing
D)
literal addressing
47)
All of the following are roles of the CPU except ________.
47)
A)
provide hardware support for the operating system
B)
control the system hardware
C)
execute application programs
D)
check for system hardware errors
48)
Microcontrollers contain external memory controllers because________.
48)
A)
communication controllers and other peripherals require external memory to operate
B)
all microcontrollers require an external ROM to boot up
C)
some microcontrollers do not contain any internal memory
D)
all of the above
49)
Application programs and data are contained in a computer system’s ________.
49)
A)
main memory
B)
FIFO memory
C)
cache memory
D)
BIOS memory
50)
Loading ________.
50)
A)
is a problem only for parallel signal buses
B)
refers to how inputs affect the operation of the outputs to which they are connected
C)
occurs only for TTL devices
D)
all of the above
51)
A device that can be used as a simple wait state generator is ________.
51)
A)
serial–in parallel–out shift register
B)
serial–in serial–out shift register
C)
parallel–in parallel–out shift register
D)
parallel–in serial–out shift register
52)
All the following are examples of application software except ________.
52)
A)
word processors
B)
hardware drivers
C)
video games
D)
database programs
53)
The addressing mode that specifies the address of the operand is ________.
53)
A)
direct addressing
B)
memory addressing
C)
immediate addressing
D)
inherent addressing
D
54)
Some types of common microcontroller peripherals include ________.
54)
A)
phase–locked loops
B)
memory
C)
quadrature encoders
D)
all of the above
D
55)
BIOS memory contains code that ________.
55)
A)
installs drivers to configure and provide access to system hardware
B)
runs the power on self–test (POST)
C)
loads the operating system
D)
all of the above
D
56)
Computers use FIFO (first–in, first–out) memory for ________.
56)
A)
the system stack
B)
special data structures called queues
C)
caching data
D)
memory–mapped I/O
B
B