Exam
Name___________________________________
MULTIPLE CHOICE. Choose the one alternative that best completes the statement or answers the question.
1)
The primary disadvantage of the simultaneous A/D converter is ________.
1)
A)
the long conversion time required
B)
the large number of output lines required to simultaneously decode the input voltage
C)
the large number of comparators required to represent a reasonable–sized binary number
D)
that it requires the input voltage to be applied to the inputs simultaneously
2)
Which of the following describes the basic operation of a single–slope A/D converter?
2)
A)
A ramp generator is used to enable a counter through a comparator. When the ramp voltage
equals the input voltage the counter is latched and then reset. The counter reading is
proportional to the input voltage since the ramp is changing at a constant V/second rate.
B)
A ramp voltage and analog input voltage are applied to a comparator. As the input voltage
causes the integrating capacitor to charge, it will at some point equal the ramp voltage. The
ramp voltage is measured and displayed on the digital panel meter.
C)
The input voltage is used to set the frequency of a voltage–controlled oscillator (VCO). The
VCO quits changing frequency when the input voltage stabilizes. The frequency of the VCO,
which is proportional to the analog input voltage, is measured and is displayed on the digital
display as a voltage reading.
D)
Any of the above could be correct, depending on the specific type of A/D converter involved.
A
3)
What type of op–amp circuit does not typically have a feedback path connected between its output
and either of its input pins?
3)
A)
An open–loop amplifier
B)
An inverter
C)
A current multiplier
D)
A comparator
D
1
C
4)
The circuit shown below is a(n) ________.
4)
A)
four–bit A/D converter
B)
R/2R ladder D/A converter
C)
binary–weighted–input DAC
D)
four–bit decoder
5)
Sigma–Delta ADC utilizes ________.
5)
A)
quantized difference between two samples
B)
a one–bit quantization method
C)
delta modulation
D)
all of the above
Figure 12–1
6)
The circuit shown in Figure 12–1 is a(n) ________.
6)
A)
four–bit decoder
B)
R/2R ladder D/A converter
C)
binary–weighted–input DAC
D)
four–bit A/D converter
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7)
DSP applications include ________.
7)
A)
filtering
B)
music processing
C)
image processing
D)
all of the above
8)
What is the output from the circuit in Figure 12–1 at the time marked ‘X’?
8)
A)
–2.75 V
B)
2.75 V
C)
–1.011 V
D)
1.011 V
9)
DSPs are programmed in ________.
9)
A)
visual basic
B)
ABEL
C)
assembly language
D)
none of the above
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Figure 12–2
10)
Refer to Figure 12–2. What, if anything, appears to be wrong with the D/A converter?
10)
A)
There is a nonlinearity error.
B)
The power supply voltage appears to be too high.
C)
There is nothing wrong with the converter.
D)
There is an offset error.
11)
What advantage does the R/2R ladder DAC have over a binary–weighted–input DAC?
11)
A)
The virtual ground is eliminated and the circuit is therefore easier to understand and
troubleshoot.
B)
It is much easier to analyze its operation.
C)
It uses only two different resistor values.
D)
It has fewer parts for the same number of inputs.
12)
An analog–to–digital converter (ADC) has a four–bit output. How many analog values can it
represent?
12)
A)
0.0625
B)
16
C)
1/4
D)
4
4
13)
The main advantage that a tracking A/D converter has over a stairstep–ramp A/D converter is that
it ________.
13)
A)
uses an up/down counter to indicate the polarity of the input voltage
B)
uses an up/down counter to allow it to measure both positive and negative voltages
C)
does not require a counter
D)
is faster
14)
What is the resolution, in percent, of a 12–bit DAC?
14)
A)
0.083
B)
0.000488
C)
0.024
D)
8.33
C
15)
What operation can a DSP perform on incoming data?
15)
A)
reduce the amplitude of selected frequencies
B)
encode the data
C)
correct errors
D)
all the above
D
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D
16)
Refer to the figure below. What should the display on the scope look like if the A/D converter is
working properly?
16)
A)
The scope should display a sequential binary count with the LSB being on the left and the
MSB on the right side of the display.
B)
The pattern should be a straight line across the screen due to the equal but opposite voltages
being applied to the scope inputs.
C)
It should be a circular Lissajous pattern resulting from the simultaneous application of ramps
to the vertical and horizontal inputs of the oscilloscope.
D)
A uniform stairstep pattern should be displayed.
17)
What is the accuracy of a D/A converter?
17)
A)
It is the reciprocal of the number of discrete steps in the D/A output.
B)
It is the deviation between the ideal straight–line output and the actual output of the
converter.
C)
It is the comparison between the actual output of the converter and its expected output.
D)
It is the ability to resolve between forward and reverse steps when sequenced over its entire
range of inputs.
C
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D
18)
Which of the statements below best describes the basic operation of a dual–slope A/D converter?
18)
A)
The input voltage is used to set the frequency of a voltage–controlled oscillator (VCO). The
VCO quits changing frequency when the input voltage stabilizes. The frequency of the VCO,
which is proportional to the analog input voltage, is measured and is displayed on the digital
display as a voltage reading.
B)
A ramp generator is used to enable a counter through a comparator. When the ramp voltage
equals the input voltage the counter is latched and then reset. The counter reading is
proportional to the input voltage since the ramp is changing at a constant V/second rate.
C)
Two ramps are generated: one by the input voltage and the other by a reference voltage. The
input voltage ramp charges the integrating capacitor, while the reference voltage discharges
the capacitor and enables the counter until the capacitor is discharged, at which time the
counter value is loaded into the output latches.
D)
A ramp voltage and analog input voltage are applied to a comparator. As the input voltage
causes the integrating capacitor to charge, it will at some point equal the ramp voltage. The
ramp voltage is measured and displayed on the digital panel meter.
19)
The highest frequency component of the analog signal in an ADC is known as the ________.
19)
A)
Shannon frequency
B)
Sampling frequency
C)
Nyquest frequency
D)
Aliasing frequency
20)
What operation can a DSP perform on incoming data?
20)
A)
detect errors
B)
increase the amplitude of selected frequencies
C)
remove unwanted interference
D)
all the above
21)
Quantization is performed by a(n) ________.
21)
A)
DAC
B)
ADC
C)
DSP
D)
Filter
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22)
What is the linearity of a D/A converter?
22)
A)
It is the ability to resolve between forward and reverse steps when sequenced over its entire
range of inputs.
B)
It is the reciprocal of the number of discrete steps in the D/A output.
C)
It is the deviation between the ideal straight–line output and the actual output of the
converter.
D)
It is the comparison between the actual output of the converter and its expected output.
23)
The CPU of the DSP is also known as ________.
23)
A)
the MIPS
B)
the DSP core
C)
the ALU
D)
the general–purpose registers
B
24)
One disadvantage of the tracking A/D converter is ________.
24)
A)
the need for a latch and its associated control circuit
B)
the binary output will oscillate between two binary states when the analog input is constant
C)
it requires two counters: one for up and one for down
D)
the need for an accurate clock reference for the counter
B
25)
Which of the equations below expresses the voltage gain relationship for an operational amplifier?
25)
A)
Vout/Vin = –Rf/Rin
B)
Vout = Vin/Av
C)
Vin/Vout = Rout/Rin
D)
Vout/Vin = Rout/Rin
A
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C
26)
What function is performed by the block labeled ‘X’ in the figure below?
26)
A)
Power supply for the audio amplifier
B)
Digital–to–analog conversion
C)
Analog–to–digital conversion
D)
Audio ON/OFF control
27)
DSP applications include ________.
27)
A)
radar
B)
speech generation
C)
telecommunications
D)
all of the above
28)
A simultaneous A/D converter is also known as a/an ________ A/D converter.
28)
A)
comparator
B)
synchronous
C)
flash
D)
asynchronous
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29)
The figure below represents a ________.
29)
A)
dual–approximation D/A comparator
B)
successive–approximation A/D converter
C)
dual–slope A/D converter
D)
tracking A/D converter
30)
An analog quantity varies from 0–7 V and is input to a 6–bit A/D converter. What analog value is
represented by each step on the digital output?
30)
A)
0.109 V
B)
0.111 V
C)
0.857 V
D)
1.17 V
B
D)
31)
What is the resolution of a D/A converter?
31)
A)
The ability to resolve between forward and reverse steps when sequenced over its entire
range of inputs.
B)
It is the reciprocal of the number of discrete steps in the D/A output.
C)
It is the comparison between the actual output of the converter and its expected output.
D)
It is the deviation between the ideal straight–line output and the actual output of the
converter.
B
D)
10
B
D)
32)
What is the main disadvantage of the stairstep–ramp A/D converter?
32)
A)
It requires a counter.
B)
It requires a precision clock in order for the conversion to be reliable.
C)
The counter must count up from zero at the beginning of each conversion sequence, so the
conversion time varies with the input voltage.
D)
All of the above are correct.
33)
Refer to the figure below. What, if anything, appears to be wrong with the output of the D/A
converter?
33)
A)
It appears that certain input codes are incorrect; double–check the input coding.
B)
The converter has a nonmonotonic output error.
C)
The input signal is probably noisy.
D)
There appears to be some nonlinearity in the scope display.
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34)
The basic approach to testing D/A converters is to ________.
34)
A)
single–step the device through its full input range while checking the output with a DMM
B)
apply the correct input to the analog terminal and then check to see if the proper binary code
exists on the digital inputs
C)
apply a sequence of binary codes covering the full range of the input to the input while
observing the output on an oscilloscope. The output should consist of a linear stairstep ramp
D)
check the output with zero input and then full input. The output of the converter should
extend from zero to its maximum value. If so, then everything in between can be assumed to
be operating properly
TRUE/FALSE. Write ‘T’ if the statement is true and ‘F’ if the statement is false.
35)
The process preformed by an ADC is called quantization.
35)
36)
Usually an analog signal does not require filtering before DSP occurs.
36)
37)
A digital–to–analog (D/A) converter changes data like temperature variations into digital
quantities.
37)
38)
The primary disadvantage of the flash A/D converter is the large number of comparators required.
38)
39)
An eight–bit D/A converter has a resolution of 0.125.
39)
40)
Digital Signal Processing is the processing of analog signals by conversion to digital form.
40)
41)
The typical DSP does not have a CPU like a general–purpose microprocessor does.
41)
42)
When the analog input to a tracking A/D converter is at a constant level, the digital output will
oscillate.
42)
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43)
The DSP, unlike the general–purpose microprocessor, must typically process data in real time; that
is, as it happens.
43)
44)
DSPs are typically programmed in either assembly language or in C.
44)
45)
An operational amplifier can be used as a comparator.
45)
46)
After DSP, a digital signal can be converted back to a much–improved version of the original
analog signal.
46)
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Answer Key
Testname: C12
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